理事单位
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会议展览
谷建餘
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Verification and Implementation of High-Speed IP in SoC Design
总裁 无锡华大国奇科技有限公司 Jianyu Gu President Qualchip Technologies, Inc.
演讲人简历： 谷建餘，国奇科技总裁。1982年毕业于广州中山大学，在国营北京第八七八厂参加工作后，始终耕耘在集成电路设计领域。曾负责第八七八厂设计中心工作，还担任北京集成电路设计中心主设计师多年。1995年赴美后曾任美国三星半导体公司高级工程师、Cadence公司主任工程师、Hifn公司ASIC总监、美国凌讯公司资深ASIC总监等职务。30年多来，主持、负责和独立设计过数百个集成电路项目，全部获得首次流片成功。 Jianyu Gu, President of Qualchip. After graduating from Sun Yat-Sen University, Guangzhou, in 1982, Mr.Gu has always cultivated in the field of IC design. He used to lead the Design Center at Dongguang Semiconductors Corp. (No. 878 Factory) and later served as Chief Designer at Beijing IC Design Center (BIDC). In 1995, Mr. Gu continued his professional work in the United States, where he excelled in a number of positions such as: Senior Engineer at Samsung Semiconductors, Principal Engineer at Cadence Design Systems, Director of ASIC at Hifn, and Senior Director of ASIC at Legend Silicon Corp. For over three decades, Mr. Gu had directed, managed and independently designed hundreds of IC projects, all of which have achieved first silicon success. |
演讲人
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